File:Parallel External Memory Model PEM.png
Summary
Category:Uploaded with en.wp upload wizard#79809875000001| Description |
English: This figure illustrates the parallel external memory model. It shows the two-level memory hierarchy and the communication between the P processors, their caches and the main memory. |
| Date | |
| Source | Created based on Fig. 1 from: Arge, L., Goodrich, M.T., Nelson, M. and Sitchinava, N., 2008, June. Fundamental parallel algorithms for private-cache chip multiprocessors. In Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures (pp. 197-206). ACM. |
| Author | Mwoelkde |
  |
This file is made available under the Creative Commons CC0 1.0 Universal Public Domain Dedication. |
| The person who associated a work with this deed has dedicated the work to the public domain by waiving all of their rights to the work worldwide under copyright law, including all related and neighboring rights, to the extent allowed by law. You can copy, modify, distribute and perform the work, even for commercial purposes, all without asking permission.
|
Licensing
 |
I, the copyright holder of this work, release this work into the public domain. This applies worldwide. In some countries this may not be legally possible; if so: I grant anyone the right to use this work for any purpose, without any conditions, unless such conditions are required by law. |
