Category:Instruction processing
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This category contains articles related to instruction processing by microprocessors.
Category:Computer architecture Category:MicroprocessorsPages in category "Category:Instruction processing"
- Address generation unit
- Anticiparallelism
- Application-specific instruction set processor
- Barrel processor
- Berkeley RISC
- Branch (computer science)
- Branch misprediction
- Branch predictor
- Branch queue
- Branch target predictor
- Burroughs B6x00-7x00 instruction set
- Control store
- Cycles per instruction
- Decoupled architecture
- Degree of parallelism
- Delay slot
- Execute instruction
- Explicitly parallel instruction computing
- General-purpose computing on graphics processing units
- Hardware reset
- Hardware scout
- Hazard (computer architecture)
- Instruction cycle
- Instruction-level parallelism
- Instruction window
- Instructions per cycle
- Interlock (engineering)
- Memory barrier
- Memory type range register
- Memory-level parallelism
- Micro-operation
- Microarchitecture
- Microcode
- MIL-STD-1750A
- Millicode
- Minimal instruction set computer
- Model-specific register
- Multithreading (computer architecture)
- No instruction set computing
- Operand forwarding
- Orthogonal instruction set
- Out-of-order execution
- Instruction pipelining
- Pipeline (computing)
- Classic RISC pipeline
- Pipeline stall
- Predication (computer architecture)
- Instruction prefetch
- Prefetch input queue
- Random logic
- Re-order buffer
- Register window
- Repeat instruction
- Reservation station
- Reset vector
- Runahead
- Scoreboarding
- Instruction set architecture
- Slipstream (computer science)
- Speculative execution
- Speculative multithreading
- Tomasulo's algorithm
- Transport triggered architecture
- TRIPS architecture
- Unicore
- Very long instruction word
- VIA PadLock
- Wide-issue
- Zero instruction set computer
- Category:GPGPU
- Category:Machine code
- Category:SIMD computing
- Category:Speculative execution
- Category:Superscalar microprocessors
- Category:Very long instruction word computing